At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.
Together, we advance your career.
AMD is looking for a talented individual to join the Wireless Engineering team as a Graduate Analog Layout Design Engineer in advanced process technology node 7nm and below. This team develops multi-giga-sample RF data converters which are key components of the Zynq® UltraScale+ RFSoC and Zynq® RFSoC DFE families.
As a Graduate Analog Layout Design Engineer, you will have the opportunity to participate in a full-custom high speed (Radio Frequency > 5GHz) and high resolution (12-bit) analog layout design activities including floor planning, block design, transistors layout assembly, metal routing planning and physical design verification (Design Rule Checking, Layout Versus Schematic Checking, Antenna Checks, Electrostatic Discharge Checks, Latch-up Checks, Electrical Rule Checking etc). Work closely with Analog circuit designer for guidance and produce a fully compliant AMD layout best practices and guidelines includes matching, symmetry, minimal cross-talk considerations, minimal IR drop considerations, minimal parasitics to achieve high performance and high speed design and etc.
Experience with Analog layout design floor planning, analog layout design from scratch
Degree/Masters in Electrical/Electronic Engineering. Completed course work should cover digital design, analog design, transistor level design and device physics.
