The Budapest System IP team has a track record of numerous successful deliveries, we have an open and relaxed culture where best-in-class, creative engineers work together on significant projects. Our upbeat and collaborative team builds System IP components used in future client, embedded and IoT devices.

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At our Budapest-based design center, you will join a hardworking team and will take part in the design and verification of performant, energy efficient and secure IP components.

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A Graduate will use novel technologies and methodologies to ensure the highest quality products as they collaborate with other Arm engineering teams to build complete IP solutions to address the performance, power and cost requirements for almost all application markets. Join and let's invent the future together!

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What you could be doing as a Graduate?

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• Be involved in System IP microarchitecture specification and design
• Participate in SystemVerilog RTL verification and debug; formal bring-up of non-trivial IP blocks to achieve required quality levels (SystemVerilog/UVM, Formal, scripting)
• Work closely with engineers across design, performance modelling, validation, and implementation to meet all functional requirements, performance, power and area goals

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We are looking for individuals who:

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Hold (or are on track to hold) a Bachelors or Masters degree in Electrical Engineering or Computer Engineering by the programme start date.

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Qualities that will help your application stand out:

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• Experience of block level RTL design and verification for non-trivial ASIC (or FPGA) developments; SystemVerilog preferred
• Familiarity with the Arm AMBA specifications or other bus protocols
• Understanding of digital design to include one or more from CPU, GPU and cache concepts, memory, I/O, etc.
• Scripting, e.g. with Perl, Python, etc.

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Additional Information:

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We encourage early applications as we review them on a first come/first served basis. Please apply as soon as you feel ready.

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