Job Description‍In your new role you will:

• Analog/Digital Verification: Support analog/digital design and verification of mixed-signal IP utilizing the Cadence suite of tools
• Simulation Execution: Create mixed-signal test benches and execute simulations on various SoC scenarios using Cadence tools
• Performance Characterization: Perform silicon bench evaluation and characterize IC performance using Python-based automation tools
• Testbench Development: Develop scalable and reusable constrained random testbenches using SystemVerilog/UVM methodologies
• Cross-Team Collaboration: Collaborate with analog and digital IC design industry experts and cross-functional teams to optimize architectures
• Functional Validation: Perform functional verification of digital multiphase buck controllers, integrated power stages, and power management circuits
• Next-Gen Design: Assist in developing next-generation IP and advance analog and mixed-signal design expertise

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‍Your Profile‍You are best equipped for this task if you are/have:

• Education: Actively pursuing Bachelor’s or Master’s degree in Electrical or Electronics Engineering
• Electronic Design: Basic courses on electronic design fundamentals
• CAD Tools: Experience with Cadence tools, creating schematics, and simulations
• Firmware Debugging: Proficiency in hardware verification languages (e.g., SystemVerilog, UVM) and firmware debugging
• Programming: Knowledge of Python and Unix/Linux shell commands
• Hardware Protocols: Understanding of PMBUS, I2C, UART, SPI, or similar protocols
• Lab Testing: Hands-on experience with test equipment like oscilloscopes and DMMs
• Soft Skills: Strong written and oral communication; effective teamwork abilities

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