Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- Academic coursework in computer architecture (e.g., core, cache, memory, etc.).
β
β
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience in designing/implementing or validating Register-Transfer Level (RTL) design (e.g., core, cache, fabric, memory, codec, etc.).
- Experience with Universal Verification Methodology (UVM), SystemVerilog, or other scripting languages such as C/C++, Python, Perl, Shell, Bash, etc.
- Familiarity with Advanced RISC Machine (ARM) instruction set architecture.
β
β
About the job
β
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
β
β
Responsibilities
- Perform performance validation and simulation using C/C++ and RTL-based models, and performance correlation.
- Participate in evaluation of future CPU designs and general architecture.
- Build functional verification infrastructure, including unit, multi-unit, core, and subsystem level verification environments.
β