NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.

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We are now looking for a motivated Timing Engineer (Circuits) to join our dynamic and growing Circuit Solutions Group! If you are a highly motivated individual who excels at improving design and timing quality and enjoys solving complex technical challenges through collaboration, we want to hear from you.

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What you will be doing:

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• Participate in groundbreaking processor design in deep submicron technologies.
• Work as part of a global circuits team alongside circuit designers to drive timing analysis and signoff of custom circuit macros (digital, semi-custom and analog mixed-signal).
• Apply knowledge and experience to standardize improving timing convergence flows while working with methodology teams.
• Develop timing models and methodology for innovative and unique custom macro designs.
• Validate timing of custom circuit designs using STA tools including PrimeTime, Tempus and various SPICE simulation tools.
• Work with circuit designers, tool developers, and timing methodology teams to validate macro level timing accuracy and correctness.
• Work with PD, DFX, Clocks, and other teams on timing signoff strategy, timing constraints, timing and power convergence, DFT, as well as timing ECO implementation.

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What we need to see:

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• MS or higher in Electrical or Computer Engineering (or equivalent experience).
• Knowledge of industry standard STA tools such as Primetime, Tempus, and other timing analysis tools.
• Basic knowledge in timing constraints generation and management.
• Basic level understanding of transistor-level circuits and SPICE simulations for correlating to STA and noise results.
• Experience in analysis and fixing of timing paths through ECOs including crosstalk and glitch noise.
• Knowledge in process variation effect modeling and experience in design convergence in multi GHz deep submicron technology.
• Familiarity with clocking specs such as jitter, IR drop, skew, crosstalk, etc.
• Understanding of extracted timing models, and the usage of .libs in Primetime.

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Ways to stand out from the crowd:

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• Understanding of DFT logic and experience with DFT timing signoff for various modes e.g., shift, capture, BIST, etc.
• Knowledge of timing closure strategies for digital logic/macros part of AMS designs/IPs.
• Experience in critical path planning and crafting, methodology, flow automation, and automation.
• Knowledge of deep sub-micron process nodes, and modeling and converging timing in these nodes.
• Strong scripting skills for flow automation; experience with TCL, Python is a plus.

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